{
 "image": "mpw-001_VIM3_reticle.png",
 "width": 53432,
 "height": 65056,
 "bit_depth": 8,
 "color_type": 0,
 "grid": {
  "rows": 6,
  "cols": 7,
  "die_w": 7176,
  "die_h": 10376,
  "gap": 400
 },
 "filter": {
  "rows": "up",
  "first_row_of_each_tile": "none"
 },
 "zlib": {
  "level": 9,
  "wbits": 15,
  "memlevel": 9,
  "strategy": 0,
  "idat_chunk_limit": 1048576
 },
 "rebuild_with": "reconstruct_reticle.py",
 "tiles": [
  {
   "file": "mpw-001_VIM3_tile_A1.png",
   "row": 0,
   "col": 0,
   "frame": "A1",
   "x": 0,
   "y": 0,
   "w": 7576,
   "h": 10776,
   "slot": "001",
   "project": "Caravel_Plus",
   "bytes": 722606,
   "sha256": "1885924e6c51ec404d4d16b1c3df4dbd66e8d93abaf0bde271e17c99c04043b7"
  },
  {
   "file": "mpw-001_VIM3_tile_A2.png",
   "row": 0,
   "col": 1,
   "frame": "A2",
   "x": 7576,
   "y": 0,
   "w": 7576,
   "h": 10776,
   "slot": "002",
   "project": "caravel_vdp_lite",
   "bytes": 393489,
   "sha256": "baf98d02f9dc26196ec0339e3003fa6b2957210b6180e89bdcee4788fa5d5c7c"
  },
  {
   "file": "mpw-001_VIM3_tile_A3.png",
   "row": 0,
   "col": 2,
   "frame": "A3",
   "x": 15152,
   "y": 0,
   "w": 7576,
   "h": 10776,
   "slot": "003",
   "project": "caravel-softshell",
   "bytes": 570361,
   "sha256": "bde7e9d778676fc2e3de3f064e5153b160a5c3a7df69633ef6a667b0e67a70e0"
  },
  {
   "file": "mpw-001_VIM3_tile_A4.png",
   "row": 0,
   "col": 3,
   "frame": "A4",
   "x": 22728,
   "y": 0,
   "w": 7576,
   "h": 10776,
   "slot": "004",
   "project": "caravel_UNCC_MPW_1",
   "bytes": 371234,
   "sha256": "a7f2ed90a21dd6e904775622a56711410ea0b338ae889b6cb8bd088eca3cf184"
  },
  {
   "file": "mpw-001_VIM3_tile_A5.png",
   "row": 0,
   "col": 4,
   "frame": "A5",
   "x": 30304,
   "y": 0,
   "w": 7576,
   "h": 10776,
   "slot": "005",
   "project": "caravel_sha3_256_crypto_",
   "bytes": 566026,
   "sha256": "494d487f4938ae08da3d818a4a0130bf24433fd8e5b953545a57863abd907688"
  },
  {
   "file": "mpw-001_VIM3_tile_A6.png",
   "row": 0,
   "col": 5,
   "frame": "A6",
   "x": 37880,
   "y": 0,
   "w": 7576,
   "h": 10776,
   "slot": "006",
   "project": "caravel_spectrometer",
   "bytes": 477728,
   "sha256": "114e39b89ec79ace5ff95c332ebcf7e12f8316f467c92a7ea896d126cfc3ee10"
  },
  {
   "file": "mpw-001_VIM3_tile_A7.png",
   "row": 0,
   "col": 6,
   "frame": "A7",
   "x": 45456,
   "y": 0,
   "w": 7976,
   "h": 10776,
   "slot": null,
   "project": null,
   "bytes": 106769,
   "sha256": "56c5b78f9b86a53fdb64304acc12fba53d045b0526cc20ac1552594029f8a19a"
  },
  {
   "file": "mpw-001_VIM3_tile_B1.png",
   "row": 1,
   "col": 0,
   "frame": "B1",
   "x": 0,
   "y": 10776,
   "w": 7576,
   "h": 10776,
   "slot": "007",
   "project": "caravel_ibtida_soc",
   "bytes": 418828,
   "sha256": "fc6a8a082261d179856483fb030b43a748e21a8e6b9a89efa61c830e04a1fd5c"
  },
  {
   "file": "mpw-001_VIM3_tile_B2.png",
   "row": 1,
   "col": 1,
   "frame": "B2",
   "x": 7576,
   "y": 10776,
   "w": 7576,
   "h": 10776,
   "slot": "008",
   "project": "caravel-hs32core",
   "bytes": 478314,
   "sha256": "a68be6a06378e0875b94a94938c7e140dd18ba582416cb22728957ad1a9f38ac"
  },
  {
   "file": "mpw-001_VIM3_tile_B3.png",
   "row": 1,
   "col": 2,
   "frame": "B3",
   "x": 15152,
   "y": 10776,
   "w": 7576,
   "h": 10776,
   "slot": "009",
   "project": "caravel_astria_testchip",
   "bytes": 441444,
   "sha256": "808afac08a11d3067b49f45dae9bb6ad417b6406f771eeb825087117b5ace280"
  },
  {
   "file": "mpw-001_VIM3_tile_B4.png",
   "row": 1,
   "col": 3,
   "frame": "B4",
   "x": 22728,
   "y": 10776,
   "w": 7576,
   "h": 10776,
   "slot": "010",
   "project": "caravel_pyfive",
   "bytes": 489906,
   "sha256": "1ad7a7ea09dc72762f41cd0617e924cc2bc0c4eb22382fdad2649b203a82664c"
  },
  {
   "file": "mpw-001_VIM3_tile_B5.png",
   "row": 1,
   "col": 4,
   "frame": "B5",
   "x": 30304,
   "y": 10776,
   "w": 7576,
   "h": 10776,
   "slot": "011",
   "project": "caravel_fasoc",
   "bytes": 594778,
   "sha256": "bb768d399345536e5ce2dd9f22d48b605af1ef7d716010c252108e2436487f25"
  },
  {
   "file": "mpw-001_VIM3_tile_B6.png",
   "row": 1,
   "col": 5,
   "frame": "B6",
   "x": 37880,
   "y": 10776,
   "w": 7576,
   "h": 10776,
   "slot": "012",
   "project": "caravel-mph",
   "bytes": 387115,
   "sha256": "6505de2246b4f1109cdedc450f2fc8f0deec3f3ac918f661287083bbc140cc85"
  },
  {
   "file": "mpw-001_VIM3_tile_B7.png",
   "row": 1,
   "col": 6,
   "frame": "B7",
   "x": 45456,
   "y": 10776,
   "w": 7976,
   "h": 10776,
   "slot": "013",
   "project": "caravel_rapcores",
   "bytes": 438971,
   "sha256": "06dc0c286545a86c9a9309ace2a8f10c66fbf20a3b928c30ce6126e1d76ab645"
  },
  {
   "file": "mpw-001_VIM3_tile_C1.png",
   "row": 2,
   "col": 0,
   "frame": "C1",
   "x": 0,
   "y": 21552,
   "w": 7576,
   "h": 10776,
   "slot": "014",
   "project": "MorphleLogic",
   "bytes": 437173,
   "sha256": "371bc44a0230641e0d2853aeecdb6439bd894fec3a85ed3e8fc074064537a226"
  },
  {
   "file": "mpw-001_VIM3_tile_C2.png",
   "row": 2,
   "col": 1,
   "frame": "C2",
   "x": 7576,
   "y": 21552,
   "w": 7576,
   "h": 10776,
   "slot": "015",
   "project": "caravel_RT-PseudoRNG",
   "bytes": 434650,
   "sha256": "6de559d86361fb7c3191f31d8aa463d5730895330bc52ef674a4c982048f3b65"
  },
  {
   "file": "mpw-001_VIM3_tile_C3.png",
   "row": 2,
   "col": 2,
   "frame": "C3",
   "x": 15152,
   "y": 21552,
   "w": 7576,
   "h": 10776,
   "slot": "016",
   "project": "caravel_amsat_txrx_ic",
   "bytes": 371964,
   "sha256": "aca45d52b88c6a5df35e4a30261380908d57795a0ef87d8f422070e8ec42e76f"
  },
  {
   "file": "mpw-001_VIM3_tile_C4.png",
   "row": 2,
   "col": 3,
   "frame": "C4",
   "x": 22728,
   "y": 21552,
   "w": 7576,
   "h": 10776,
   "slot": "017",
   "project": "Caravel-SOFA-HD",
   "bytes": 678476,
   "sha256": "9e49920f180fc97187c62a53eb88b4a30fbd8652832a1a3ddf3d98cbe325eb4b"
  },
  {
   "file": "mpw-001_VIM3_tile_C5.png",
   "row": 2,
   "col": 4,
   "frame": "C5",
   "x": 30304,
   "y": 21552,
   "w": 7576,
   "h": 10776,
   "slot": null,
   "project": null,
   "bytes": 102728,
   "sha256": "404d2b68827b8f64404c8d26b19179b934888b57260a33a16e25162769e85650"
  },
  {
   "file": "mpw-001_VIM3_tile_C6.png",
   "row": 2,
   "col": 5,
   "frame": "C6",
   "x": 37880,
   "y": 21552,
   "w": 7576,
   "h": 10776,
   "slot": "018",
   "project": "caravel_Ghazi_SoC",
   "bytes": 458567,
   "sha256": "b069649bb4688b730d69c6746099b44b2a5d56226cccb1be2d288a1ba56385bd"
  },
  {
   "file": "mpw-001_VIM3_tile_C7.png",
   "row": 2,
   "col": 6,
   "frame": "C7",
   "x": 45456,
   "y": 21552,
   "w": 7976,
   "h": 10776,
   "slot": "019",
   "project": "caravel_fulgor_opamp",
   "bytes": 395761,
   "sha256": "a8e08966d18707d4b64368b731fa1ec48dafd668b05302d6ad6c9b0640f71e25"
  },
  {
   "file": "mpw-001_VIM3_tile_D1.png",
   "row": 3,
   "col": 0,
   "frame": "D1",
   "x": 0,
   "y": 32328,
   "w": 7576,
   "h": 10776,
   "slot": "020",
   "project": "q-rib",
   "bytes": 425650,
   "sha256": "04648f332d128fc4a0f1d52686997df9c978e58262c6415ccd5317733ac6862f"
  },
  {
   "file": "mpw-001_VIM3_tile_D2.png",
   "row": 3,
   "col": 1,
   "frame": "D2",
   "x": 7576,
   "y": 32328,
   "w": 7576,
   "h": 10776,
   "slot": "021",
   "project": "caravel_fwpayload",
   "bytes": 448721,
   "sha256": "3d5abaceabe0ed40a92d37e34ff671e05c8791903ecf448c5d60f2b2902e853b"
  },
  {
   "file": "mpw-001_VIM3_tile_D3.png",
   "row": 3,
   "col": 2,
   "frame": "D3",
   "x": 15152,
   "y": 32328,
   "w": 7576,
   "h": 10776,
   "slot": "022",
   "project": "caravel_OpenTDC",
   "bytes": 461575,
   "sha256": "3f2bf5c3546ed43d73e0a0085ddfee863a54994afa6a0a49faa212d3e860399d"
  },
  {
   "file": "mpw-001_VIM3_tile_D4.png",
   "row": 3,
   "col": 3,
   "frame": "D4",
   "x": 22728,
   "y": 32328,
   "w": 7576,
   "h": 10776,
   "slot": "023",
   "project": "caravel_analog_rf",
   "bytes": 275315,
   "sha256": "bad33d0ae6ff42d7cb573a83878003294ea05507e4df5a1977b276af2b5748dd"
  },
  {
   "file": "mpw-001_VIM3_tile_D5.png",
   "row": 3,
   "col": 4,
   "frame": "D5",
   "x": 30304,
   "y": 32328,
   "w": 7576,
   "h": 10776,
   "slot": "024",
   "project": "Caravel_Fault_SPM",
   "bytes": 371106,
   "sha256": "a2780d5039fcf3c88c93b0d8555ebbc1423a523dc1f62cfc105e1dc2f2907806"
  },
  {
   "file": "mpw-001_VIM3_tile_D6.png",
   "row": 3,
   "col": 5,
   "frame": "D6",
   "x": 37880,
   "y": 32328,
   "w": 7576,
   "h": 10776,
   "slot": "025",
   "project": "caravel_skywater130_decr",
   "bytes": 527508,
   "sha256": "154e9b1890483d6b0d25efdfa2ea2953f3a950f84ae193b40858097feb0dfc69"
  },
  {
   "file": "mpw-001_VIM3_tile_D7.png",
   "row": 3,
   "col": 6,
   "frame": "D7",
   "x": 45456,
   "y": 32328,
   "w": 7976,
   "h": 10776,
   "slot": "026",
   "project": "microwatt-caravel",
   "bytes": 591435,
   "sha256": "af487569766047d831c163d81b5df3502d941f298063b60f2ec4d184f0d9c612"
  },
  {
   "file": "mpw-001_VIM3_tile_E1.png",
   "row": 4,
   "col": 0,
   "frame": "E1",
   "x": 0,
   "y": 43104,
   "w": 7576,
   "h": 10776,
   "slot": "027",
   "project": "caravel_mram",
   "bytes": 367636,
   "sha256": "cdf15820ce268ae20660287348e4958e9302fc26c281e62e448d08f91ac71174"
  },
  {
   "file": "mpw-001_VIM3_tile_E2.png",
   "row": 4,
   "col": 1,
   "frame": "E2",
   "x": 7576,
   "y": 43104,
   "w": 7576,
   "h": 10776,
   "slot": "028",
   "project": "Caravel_EL2_SoC",
   "bytes": 557223,
   "sha256": "6d7c31d09e06480c126e671b7cafd07b474b5bc1731c34ccb06697c3b39acfe6"
  },
  {
   "file": "mpw-001_VIM3_tile_E3.png",
   "row": 4,
   "col": 2,
   "frame": "E3",
   "x": 15152,
   "y": 43104,
   "w": 7576,
   "h": 10776,
   "slot": "029",
   "project": "caravel_aes",
   "bytes": 454615,
   "sha256": "1383708e624cf9ed9c850c8112379aad2b33b87466b6c2dec8b2793da8c4c61c"
  },
  {
   "file": "mpw-001_VIM3_tile_E4.png",
   "row": 4,
   "col": 3,
   "frame": "E4",
   "x": 22728,
   "y": 43104,
   "w": 7576,
   "h": 10776,
   "slot": "030",
   "project": "Caravel-OpenFPGA-EF",
   "bytes": 483292,
   "sha256": "31436de5696d9c6bef9ad34c0fb0759a7372c9aa0d218cbcf7182e06644a4598"
  },
  {
   "file": "mpw-001_VIM3_tile_E5.png",
   "row": 4,
   "col": 4,
   "frame": "E5",
   "x": 30304,
   "y": 43104,
   "w": 7576,
   "h": 10776,
   "slot": "031",
   "project": "Caravel_Chameleon_SoC",
   "bytes": 549100,
   "sha256": "7b7ad5ac6b2068876cbac12be295b6a363d3baebd1a3cc8afef4eb9271fc99c6"
  },
  {
   "file": "mpw-001_VIM3_tile_E6.png",
   "row": 4,
   "col": 5,
   "frame": "E6",
   "x": 37880,
   "y": 43104,
   "w": 7576,
   "h": 10776,
   "slot": "032",
   "project": "Caravel_N5_SoC",
   "bytes": 508752,
   "sha256": "b36cc5f5cc4762a8d373d2ed912f076f77c7ce3ffd2e92cbebd4df59e0844fe1"
  },
  {
   "file": "mpw-001_VIM3_tile_E7.png",
   "row": 4,
   "col": 6,
   "frame": "E7",
   "x": 45456,
   "y": 43104,
   "w": 7976,
   "h": 10776,
   "slot": "033",
   "project": "caravel_linsorter",
   "bytes": 437188,
   "sha256": "24ec5b6c557da3958e1a308bbe900baf79d4e99323fb0071ec27bc581a50008c"
  },
  {
   "file": "mpw-001_VIM3_tile_F1.png",
   "row": 5,
   "col": 0,
   "frame": "F1",
   "x": 0,
   "y": 53880,
   "w": 7576,
   "h": 11176,
   "slot": "034",
   "project": "caravel_fpga250",
   "bytes": 522139,
   "sha256": "ab1df597570e776081c8fef42eb3c29a706b2066149aa4b52f29048aa4ea98fb"
  },
  {
   "file": "mpw-001_VIM3_tile_F2.png",
   "row": 5,
   "col": 1,
   "frame": "F2",
   "x": 7576,
   "y": 53880,
   "w": 7576,
   "h": 11176,
   "slot": "035",
   "project": "crypto-accelerator-build",
   "bytes": 445940,
   "sha256": "24148226c11b63172455289d113d05d7ba4ff2a61b561393f5707c9fa23a3353"
  },
  {
   "file": "mpw-001_VIM3_tile_F3.png",
   "row": 5,
   "col": 2,
   "frame": "F3",
   "x": 15152,
   "y": 53880,
   "w": 7576,
   "h": 11176,
   "slot": "036",
   "project": "Caravel-QLSOFA-HD",
   "bytes": 723221,
   "sha256": "17761c89f7e1ef5cb5079f983326751b861da11919d46e90c6857811b6d2836a"
  },
  {
   "file": "mpw-001_VIM3_tile_F4.png",
   "row": 5,
   "col": 3,
   "frame": "F4",
   "x": 22728,
   "y": 53880,
   "w": 7576,
   "h": 11176,
   "slot": "037",
   "project": "G_Skywater130nm_1stTO",
   "bytes": 375358,
   "sha256": "35ae1d49d58f039efeb1eb3f33bf04d43915e6a30238527b93b520279256c49e"
  },
  {
   "file": "mpw-001_VIM3_tile_F5.png",
   "row": 5,
   "col": 4,
   "frame": "F5",
   "x": 30304,
   "y": 53880,
   "w": 7576,
   "h": 11176,
   "slot": "038",
   "project": "caravel_DSP48_DAC",
   "bytes": 435681,
   "sha256": "7eebce1d764efb0dcbbebe6b1ef3271efd95c71c032f6f7634d79dd834ce65d4"
  },
  {
   "file": "mpw-001_VIM3_tile_F6.png",
   "row": 5,
   "col": 5,
   "frame": "F6",
   "x": 37880,
   "y": 53880,
   "w": 7576,
   "h": 11176,
   "slot": "039",
   "project": "Caravel-SOFA-CHD",
   "bytes": 687590,
   "sha256": "83c24cf1cb3d6e1b17debd70d948cff16ffd64e0d5f97bbf11ba5745c3f42b0f"
  },
  {
   "file": "mpw-001_VIM3_tile_F7.png",
   "row": 5,
   "col": 6,
   "frame": "F7",
   "x": 45456,
   "y": 53880,
   "w": 7976,
   "h": 11176,
   "slot": "040",
   "project": "caravel_riscv_osu",
   "bytes": 443964,
   "sha256": "6af512d0ad2f833796b4ca082808e0486868ab50ad3cdec144fbc99b0108b3d3"
  }
 ],
 "sha256": {
  "png": "030b9bedcef9ae4eb978841e0793953d2dd57ab2a1b4ed54eebaa838143daad8",
  "filtered_stream": "7199c67d6740bcf164fea62e8a1b136ca6745cb8d2aa723692bf660ad0bfcdbe",
  "pixels": "8c6f934860b2a8e160693501fa12482246fa1792ff23fee126fb4e86ea7c2b51"
 }
}