{
 "image": "mpw-004_CAPM_reticle.png",
 "width": 53432,
 "height": 65056,
 "bit_depth": 8,
 "color_type": 0,
 "grid": {
  "rows": 6,
  "cols": 7,
  "die_w": 7176,
  "die_h": 10376,
  "gap": 400
 },
 "filter": {
  "rows": "up",
  "first_row_of_each_tile": "none"
 },
 "zlib": {
  "level": 9,
  "wbits": 15,
  "memlevel": 9,
  "strategy": 0,
  "idat_chunk_limit": 1048576
 },
 "rebuild_with": "reconstruct_reticle.py",
 "tiles": [
  {
   "file": "mpw-004_CAPM_tile_A1.png",
   "row": 0,
   "col": 0,
   "frame": "A1",
   "x": 0,
   "y": 0,
   "w": 7576,
   "h": 10776,
   "slot": "001",
   "project": "zero_to_asic_course_group_submission_mpw4",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_A2.png",
   "row": 0,
   "col": 1,
   "frame": "A2",
   "x": 7576,
   "y": 0,
   "w": 7576,
   "h": 10776,
   "slot": "002",
   "project": "zero_to_asic_course_mpw2_re-run",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_A3.png",
   "row": 0,
   "col": 2,
   "frame": "A3",
   "x": 15152,
   "y": 0,
   "w": 7576,
   "h": 10776,
   "slot": "003",
   "project": "cmos_only_self-biased_current_source",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_A4.png",
   "row": 0,
   "col": 3,
   "frame": "A4",
   "x": 22728,
   "y": 0,
   "w": 7576,
   "h": 10776,
   "slot": "004",
   "project": "pifive-soc",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_A5.png",
   "row": 0,
   "col": 4,
   "frame": "A5",
   "x": 30304,
   "y": 0,
   "w": 7576,
   "h": 10776,
   "slot": "005",
   "project": "ram_generator",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_A6.png",
   "row": 0,
   "col": 5,
   "frame": "A6",
   "x": 37880,
   "y": 0,
   "w": 7576,
   "h": 10776,
   "slot": "006",
   "project": "space_controller",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_A7.png",
   "row": 0,
   "col": 6,
   "frame": "A7",
   "x": 45456,
   "y": 0,
   "w": 7976,
   "h": 10776,
   "slot": null,
   "project": null,
   "bytes": 106769,
   "sha256": "56c5b78f9b86a53fdb64304acc12fba53d045b0526cc20ac1552594029f8a19a"
  },
  {
   "file": "mpw-004_CAPM_tile_B1.png",
   "row": 1,
   "col": 0,
   "frame": "B1",
   "x": 0,
   "y": 10776,
   "w": 7576,
   "h": 10776,
   "slot": "007",
   "project": "randsack_b1",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_B2.png",
   "row": 1,
   "col": 1,
   "frame": "B2",
   "x": 7576,
   "y": 10776,
   "w": 7576,
   "h": 10776,
   "slot": "008",
   "project": "4t1r_testchip",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_B3.png",
   "row": 1,
   "col": 2,
   "frame": "B3",
   "x": 15152,
   "y": 10776,
   "w": 7576,
   "h": 10776,
   "slot": "009",
   "project": "yonga-turbo_encoder",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_B4.png",
   "row": 1,
   "col": 3,
   "frame": "B4",
   "x": 22728,
   "y": 10776,
   "w": 7576,
   "h": 10776,
   "slot": "010",
   "project": "icesoc",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_B5.png",
   "row": 1,
   "col": 4,
   "frame": "B5",
   "x": 30304,
   "y": 10776,
   "w": 7576,
   "h": 10776,
   "slot": "011",
   "project": "key_value_store",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_B6.png",
   "row": 1,
   "col": 5,
   "frame": "B6",
   "x": 37880,
   "y": 10776,
   "w": 7576,
   "h": 10776,
   "slot": "012",
   "project": "subservient-mpw4",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_B7.png",
   "row": 1,
   "col": 6,
   "frame": "B7",
   "x": 45456,
   "y": 10776,
   "w": 7976,
   "h": 10776,
   "slot": "013",
   "project": "logic_bist",
   "bytes": 106921,
   "sha256": "293f7b3bb80ecc8189b598f4d0936a4ee71b39727ca6a3f6013d6d774509850c"
  },
  {
   "file": "mpw-004_CAPM_tile_C1.png",
   "row": 2,
   "col": 0,
   "frame": "C1",
   "x": 0,
   "y": 21552,
   "w": 7576,
   "h": 10776,
   "slot": "014",
   "project": "riscduino-r1",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_C2.png",
   "row": 2,
   "col": 1,
   "frame": "C2",
   "x": 7576,
   "y": 21552,
   "w": 7576,
   "h": 10776,
   "slot": "015",
   "project": "template",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_C3.png",
   "row": 2,
   "col": 2,
   "frame": "C3",
   "x": 15152,
   "y": 21552,
   "w": 7576,
   "h": 10776,
   "slot": "016",
   "project": "vexriscv_soc",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_C4.png",
   "row": 2,
   "col": 3,
   "frame": "C4",
   "x": 22728,
   "y": 21552,
   "w": 7576,
   "h": 10776,
   "slot": "017",
   "project": "ring_oscillator",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_C5.png",
   "row": 2,
   "col": 4,
   "frame": "C5",
   "x": 30304,
   "y": 21552,
   "w": 7576,
   "h": 10776,
   "slot": null,
   "project": null,
   "bytes": 102728,
   "sha256": "404d2b68827b8f64404c8d26b19179b934888b57260a33a16e25162769e85650"
  },
  {
   "file": "mpw-004_CAPM_tile_C6.png",
   "row": 2,
   "col": 5,
   "frame": "C6",
   "x": 37880,
   "y": 21552,
   "w": 7576,
   "h": 10776,
   "slot": "018",
   "project": "an_mssro-based_vcro",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_C7.png",
   "row": 2,
   "col": 6,
   "frame": "C7",
   "x": 45456,
   "y": 21552,
   "w": 7976,
   "h": 10776,
   "slot": "019",
   "project": "approximate_multiplier",
   "bytes": 106921,
   "sha256": "293f7b3bb80ecc8189b598f4d0936a4ee71b39727ca6a3f6013d6d774509850c"
  },
  {
   "file": "mpw-004_CAPM_tile_D1.png",
   "row": 3,
   "col": 0,
   "frame": "D1",
   "x": 0,
   "y": 32328,
   "w": 7576,
   "h": 10776,
   "slot": "020",
   "project": "icd_fast_nu_mpw4",
   "bytes": 105432,
   "sha256": "64ad568d782b256ebfc745fead217e6fdddfab9c95a6cdac98d70aec18b5cec9"
  },
  {
   "file": "mpw-004_CAPM_tile_D2.png",
   "row": 3,
   "col": 1,
   "frame": "D2",
   "x": 7576,
   "y": 32328,
   "w": 7576,
   "h": 10776,
   "slot": "021",
   "project": "rram_testchip",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_D3.png",
   "row": 3,
   "col": 2,
   "frame": "D3",
   "x": 15152,
   "y": 32328,
   "w": 7576,
   "h": 10776,
   "slot": "022",
   "project": "rest",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_D4.png",
   "row": 3,
   "col": 3,
   "frame": "D4",
   "x": 22728,
   "y": 32328,
   "w": 7576,
   "h": 10776,
   "slot": "023",
   "project": "fault_tolerant_16-bit_alu_design",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_D5.png",
   "row": 3,
   "col": 4,
   "frame": "D5",
   "x": 30304,
   "y": 32328,
   "w": 7576,
   "h": 10776,
   "slot": "024",
   "project": "sky130_radtol_test_chip",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_D6.png",
   "row": 3,
   "col": 5,
   "frame": "D6",
   "x": 37880,
   "y": 32328,
   "w": 7576,
   "h": 10776,
   "slot": "025",
   "project": "two_stage_cmos_opamp",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_D7.png",
   "row": 3,
   "col": 6,
   "frame": "D7",
   "x": 45456,
   "y": 32328,
   "w": 7976,
   "h": 10776,
   "slot": "026",
   "project": "ks-guitar",
   "bytes": 106921,
   "sha256": "293f7b3bb80ecc8189b598f4d0936a4ee71b39727ca6a3f6013d6d774509850c"
  },
  {
   "file": "mpw-004_CAPM_tile_E1.png",
   "row": 4,
   "col": 0,
   "frame": "E1",
   "x": 0,
   "y": 43104,
   "w": 7576,
   "h": 10776,
   "slot": "027",
   "project": "ks-guitar-2s",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_E2.png",
   "row": 4,
   "col": 1,
   "frame": "E2",
   "x": 7576,
   "y": 43104,
   "w": 7576,
   "h": 10776,
   "slot": "028",
   "project": "yifive_a2",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_E3.png",
   "row": 4,
   "col": 2,
   "frame": "E3",
   "x": 15152,
   "y": 43104,
   "w": 7576,
   "h": 10776,
   "slot": "029",
   "project": "coriolis_test_soc_-_mpw4",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_E4.png",
   "row": 4,
   "col": 3,
   "frame": "E4",
   "x": 22728,
   "y": 43104,
   "w": 7576,
   "h": 10776,
   "slot": "030",
   "project": "sar-adc_and_analog_circuits",
   "bytes": 104509,
   "sha256": "b48d88cc7781c08dd167bf87e5616a370875eb935af867e2e2d5118fb1139315"
  },
  {
   "file": "mpw-004_CAPM_tile_E5.png",
   "row": 4,
   "col": 4,
   "frame": "E5",
   "x": 30304,
   "y": 43104,
   "w": 7576,
   "h": 10776,
   "slot": "031",
   "project": "junga_soc_mpw4",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_E6.png",
   "row": 4,
   "col": 5,
   "frame": "E6",
   "x": 37880,
   "y": 43104,
   "w": 7576,
   "h": 10776,
   "slot": "032",
   "project": "ibtida-ii",
   "bytes": 102867,
   "sha256": "a0dbd42a8e3b2535aea82ed594c78cf0746bdbfac6522550c6e0f58882dce2af"
  },
  {
   "file": "mpw-004_CAPM_tile_E7.png",
   "row": 4,
   "col": 6,
   "frame": "E7",
   "x": 45456,
   "y": 43104,
   "w": 7976,
   "h": 10776,
   "slot": "033",
   "project": "azadi_ii",
   "bytes": 106921,
   "sha256": "293f7b3bb80ecc8189b598f4d0936a4ee71b39727ca6a3f6013d6d774509850c"
  },
  {
   "file": "mpw-004_CAPM_tile_F1.png",
   "row": 5,
   "col": 0,
   "frame": "F1",
   "x": 0,
   "y": 53880,
   "w": 7576,
   "h": 11176,
   "slot": "034",
   "project": "open_source_configurable_fpga_fabric",
   "bytes": 106701,
   "sha256": "b2d0c106177c99cb6a58b0f92661ce84240bd93274f4d79f662ff5a6a8b7593b"
  },
  {
   "file": "mpw-004_CAPM_tile_F2.png",
   "row": 5,
   "col": 1,
   "frame": "F2",
   "x": 7576,
   "y": 53880,
   "w": 7576,
   "h": 11176,
   "slot": "035",
   "project": "current_starved_vco",
   "bytes": 106701,
   "sha256": "b2d0c106177c99cb6a58b0f92661ce84240bd93274f4d79f662ff5a6a8b7593b"
  },
  {
   "file": "mpw-004_CAPM_tile_F3.png",
   "row": 5,
   "col": 2,
   "frame": "F3",
   "x": 15152,
   "y": 53880,
   "w": 7576,
   "h": 11176,
   "slot": "036",
   "project": "updown_counter__test_",
   "bytes": 106701,
   "sha256": "b2d0c106177c99cb6a58b0f92661ce84240bd93274f4d79f662ff5a6a8b7593b"
  },
  {
   "file": "mpw-004_CAPM_tile_F4.png",
   "row": 5,
   "col": 3,
   "frame": "F4",
   "x": 22728,
   "y": 53880,
   "w": 7576,
   "h": 11176,
   "slot": "037",
   "project": "skullfet",
   "bytes": 106701,
   "sha256": "b2d0c106177c99cb6a58b0f92661ce84240bd93274f4d79f662ff5a6a8b7593b"
  },
  {
   "file": "mpw-004_CAPM_tile_F5.png",
   "row": 5,
   "col": 4,
   "frame": "F5",
   "x": 30304,
   "y": 53880,
   "w": 7576,
   "h": 11176,
   "slot": "038",
   "project": "cmos_rail-to-rail_comparator",
   "bytes": 106701,
   "sha256": "b2d0c106177c99cb6a58b0f92661ce84240bd93274f4d79f662ff5a6a8b7593b"
  },
  {
   "file": "mpw-004_CAPM_tile_F6.png",
   "row": 5,
   "col": 5,
   "frame": "F6",
   "x": 37880,
   "y": 53880,
   "w": 7576,
   "h": 11176,
   "slot": "039",
   "project": "kasirga_k0",
   "bytes": 106701,
   "sha256": "b2d0c106177c99cb6a58b0f92661ce84240bd93274f4d79f662ff5a6a8b7593b"
  },
  {
   "file": "mpw-004_CAPM_tile_F7.png",
   "row": 5,
   "col": 6,
   "frame": "F7",
   "x": 45456,
   "y": 53880,
   "w": 7976,
   "h": 11176,
   "slot": "040",
   "project": "iotestvehicle",
   "bytes": 110871,
   "sha256": "5fbd4417aa5c04604eca90097c7419b94a4f810eb592fea229db184fd64d801c"
  }
 ],
 "sha256": {
  "png": "50211c2d7605a599f09d48d29b9ca4470a1e525d5f0f5ff66246b9fda607ff9a",
  "filtered_stream": "13de7263b6a62b39cf4fee46ebeb81f8c1ce49d79ff3f593a126d56ef5326592",
  "pixels": "1fa6697c50c22d4a42ff6194b6757fa6f6334c88fdc3bf183ded0fd74cf2c3d5"
 }
}