{
 "image": "mpw-005_NSDM_reticle.png",
 "width": 53432,
 "height": 65056,
 "bit_depth": 8,
 "color_type": 0,
 "grid": {
  "rows": 6,
  "cols": 7,
  "die_w": 7176,
  "die_h": 10376,
  "gap": 400
 },
 "filter": {
  "rows": "up",
  "first_row_of_each_tile": "none"
 },
 "zlib": {
  "level": 9,
  "wbits": 15,
  "memlevel": 9,
  "strategy": 0,
  "idat_chunk_limit": 1048576
 },
 "rebuild_with": "reconstruct_reticle.py",
 "tiles": [
  {
   "file": "mpw-005_NSDM_tile_A1.png",
   "row": 0,
   "col": 0,
   "frame": "A1",
   "x": 0,
   "y": 0,
   "w": 7576,
   "h": 10776,
   "slot": "001",
   "project": "pll-based_capacitance-to-digital_converter_mpw4",
   "bytes": 862352,
   "sha256": "4dc1c47acd2657eea863dd226000b0305c4a8cf4eeae25301aea694c88923449"
  },
  {
   "file": "mpw-005_NSDM_tile_A2.png",
   "row": 0,
   "col": 1,
   "frame": "A2",
   "x": 7576,
   "y": 0,
   "w": 7576,
   "h": 10776,
   "slot": "002",
   "project": "mpw5_cache",
   "bytes": 954324,
   "sha256": "87222a30494cd5812a417f71858dbb57b355b08a3609bf056d6e89041912b84d"
  },
  {
   "file": "mpw-005_NSDM_tile_A3.png",
   "row": 0,
   "col": 2,
   "frame": "A3",
   "x": 15152,
   "y": 0,
   "w": 7576,
   "h": 10776,
   "slot": "003",
   "project": "zero_to_asic_course_group_submission_mpw5",
   "bytes": 1513566,
   "sha256": "40bd859b83b5a30728d8d0833ce35a3f74249ce0c79e50098700bed86748983a"
  },
  {
   "file": "mpw-005_NSDM_tile_A4.png",
   "row": 0,
   "col": 3,
   "frame": "A4",
   "x": 22728,
   "y": 0,
   "w": 7576,
   "h": 10776,
   "slot": "004",
   "project": "zero_to_asic_mpw2_rerun_on_mpw5",
   "bytes": 1085042,
   "sha256": "e43ff832c38a4857279d7b6138e72a71674a9e1ed54d08bf9a76fa321b25a9db"
  },
  {
   "file": "mpw-005_NSDM_tile_A5.png",
   "row": 0,
   "col": 4,
   "frame": "A5",
   "x": 30304,
   "y": 0,
   "w": 7576,
   "h": 10776,
   "slot": "005",
   "project": "zero_to_asic_mpw3_rerun_on_mpw5",
   "bytes": 1107704,
   "sha256": "ebe796ac9558979882afcaa97f812a89c82e375dc463ccc3af7ee55180950e05"
  },
  {
   "file": "mpw-005_NSDM_tile_A6.png",
   "row": 0,
   "col": 5,
   "frame": "A6",
   "x": 37880,
   "y": 0,
   "w": 7576,
   "h": 10776,
   "slot": "006",
   "project": "zero_to_asic_mpw4-rerun",
   "bytes": 1328223,
   "sha256": "2787e5b13d4da9fac980e629a106703571096afcbb0d6034dc0e9aef1f83933e"
  },
  {
   "file": "mpw-005_NSDM_tile_A7.png",
   "row": 0,
   "col": 6,
   "frame": "A7",
   "x": 45456,
   "y": 0,
   "w": 7976,
   "h": 10776,
   "slot": null,
   "project": null,
   "bytes": 106769,
   "sha256": "56c5b78f9b86a53fdb64304acc12fba53d045b0526cc20ac1552594029f8a19a"
  },
  {
   "file": "mpw-005_NSDM_tile_B1.png",
   "row": 1,
   "col": 0,
   "frame": "B1",
   "x": 0,
   "y": 10776,
   "w": 7576,
   "h": 10776,
   "slot": "007",
   "project": "actuatorcontroller",
   "bytes": 1027627,
   "sha256": "279d04a9f5cd757fb3f35c9892e5b0e059b597d5be708518561454469059d5c3"
  },
  {
   "file": "mpw-005_NSDM_tile_B2.png",
   "row": 1,
   "col": 1,
   "frame": "B2",
   "x": 7576,
   "y": 10776,
   "w": 7576,
   "h": 10776,
   "slot": "008",
   "project": "microwatt_mpw5",
   "bytes": 2633412,
   "sha256": "092ef726c3555229700d9b95ad41ed46c5f5759bce6323ce7e7b64ed207b3379"
  },
  {
   "file": "mpw-005_NSDM_tile_B3.png",
   "row": 1,
   "col": 2,
   "frame": "B3",
   "x": 15152,
   "y": 10776,
   "w": 7576,
   "h": 10776,
   "slot": "009",
   "project": "armleo_gpio_mpw5",
   "bytes": 1294354,
   "sha256": "ce77bf731d1dc1cbc87fae958c08c5248f8a38efc8db45ace946ed173e9635b9"
  },
  {
   "file": "mpw-005_NSDM_tile_B4.png",
   "row": 1,
   "col": 3,
   "frame": "B4",
   "x": 22728,
   "y": 10776,
   "w": 7576,
   "h": 10776,
   "slot": "010",
   "project": "fabulous_efpga",
   "bytes": 2184782,
   "sha256": "56746ef007ac8e5790f6ed3e4e67efd5158ed7dc8ab02e11558d58ebc20c2fba"
  },
  {
   "file": "mpw-005_NSDM_tile_B5.png",
   "row": 1,
   "col": 4,
   "frame": "B5",
   "x": 30304,
   "y": 10776,
   "w": 7576,
   "h": 10776,
   "slot": "011",
   "project": "i2c_controller",
   "bytes": 876534,
   "sha256": "4028f0364c16e4372f3468467def32cc6592fcd49f1fce1e127a36031c822863"
  },
  {
   "file": "mpw-005_NSDM_tile_B6.png",
   "row": 1,
   "col": 5,
   "frame": "B6",
   "x": 37880,
   "y": 10776,
   "w": 7576,
   "h": 10776,
   "slot": "012",
   "project": "lbist-mbist",
   "bytes": 1511285,
   "sha256": "c989c3d394f4045fb7fcaf03e35d50d0a569ebe674a1f461a748ebbe4bf81ea8"
  },
  {
   "file": "mpw-005_NSDM_tile_B7.png",
   "row": 1,
   "col": 6,
   "frame": "B7",
   "x": 45456,
   "y": 10776,
   "w": 7976,
   "h": 10776,
   "slot": "013",
   "project": "riscduino-dual_core__rd0_",
   "bytes": 1859066,
   "sha256": "ff7277672c992f1c819215d7637c64063a08da381583f87b6c8dbe5a93e37ed4"
  },
  {
   "file": "mpw-005_NSDM_tile_C1.png",
   "row": 2,
   "col": 0,
   "frame": "C1",
   "x": 0,
   "y": 21552,
   "w": 7576,
   "h": 10776,
   "slot": "014",
   "project": "riscduino-qcore__q0_",
   "bytes": 1845346,
   "sha256": "ce852f36737b24521b903aeb878e6e50473afe96edcef471e49210b1862c4f73"
  },
  {
   "file": "mpw-005_NSDM_tile_C2.png",
   "row": 2,
   "col": 1,
   "frame": "C2",
   "x": 7576,
   "y": 21552,
   "w": 7576,
   "h": 10776,
   "slot": "015",
   "project": "high_speed_vco",
   "bytes": 862235,
   "sha256": "6ae192d861d309e6e67d4712ae314e8fdc6dde92c7112f0191bea8585d189bfa"
  },
  {
   "file": "mpw-005_NSDM_tile_C3.png",
   "row": 2,
   "col": 2,
   "frame": "C3",
   "x": 15152,
   "y": 21552,
   "w": 7576,
   "h": 10776,
   "slot": "016",
   "project": "openfasoc-cryo-gen",
   "bytes": 917700,
   "sha256": "d04996add4b072d2959396270ac468769e8ff3965ff77014ce50cb8dd8520da6"
  },
  {
   "file": "mpw-005_NSDM_tile_C4.png",
   "row": 2,
   "col": 3,
   "frame": "C4",
   "x": 22728,
   "y": 21552,
   "w": 7576,
   "h": 10776,
   "slot": "017",
   "project": "microwave_signal_generator",
   "bytes": 869874,
   "sha256": "1de7676439895b9441615caf963df5372e0fcacbec62590abcec148c1ea5b97d"
  },
  {
   "file": "mpw-005_NSDM_tile_C5.png",
   "row": 2,
   "col": 4,
   "frame": "C5",
   "x": 30304,
   "y": 21552,
   "w": 7576,
   "h": 10776,
   "slot": null,
   "project": null,
   "bytes": 102728,
   "sha256": "404d2b68827b8f64404c8d26b19179b934888b57260a33a16e25162769e85650"
  },
  {
   "file": "mpw-005_NSDM_tile_C6.png",
   "row": 2,
   "col": 5,
   "frame": "C6",
   "x": 37880,
   "y": 21552,
   "w": 7576,
   "h": 10776,
   "slot": "018",
   "project": "pico_design_resubmission_mpw5",
   "bytes": 1329061,
   "sha256": "1ef0e5067d0efb68ed5b7589cb1b3acb27d2c6a5841cbf153efbd6af686dea74"
  },
  {
   "file": "mpw-005_NSDM_tile_C7.png",
   "row": 2,
   "col": 6,
   "frame": "C7",
   "x": 45456,
   "y": 21552,
   "w": 7976,
   "h": 10776,
   "slot": "019",
   "project": "ask_modulator_and_impedance_transformer",
   "bytes": 867932,
   "sha256": "7cde49f9a31e90ac554f1ba167ea286e01e6e0d3bf1a1f5e7fa2808ff745f10f"
  },
  {
   "file": "mpw-005_NSDM_tile_D1.png",
   "row": 3,
   "col": 0,
   "frame": "D1",
   "x": 0,
   "y": 32328,
   "w": 7576,
   "h": 10776,
   "slot": "020",
   "project": "baseband_inductorless_automatic_gain_control",
   "bytes": 849011,
   "sha256": "7c3920c8b384cfbaeb3c2d5ca6d5d3ef09d1ab0be58f9c764300ca0009fda862"
  },
  {
   "file": "mpw-005_NSDM_tile_D2.png",
   "row": 3,
   "col": 1,
   "frame": "D2",
   "x": 7576,
   "y": 32328,
   "w": 7576,
   "h": 10776,
   "slot": "021",
   "project": "azadi_iii",
   "bytes": 1786522,
   "sha256": "5a5d256a83a2906bfb638cf16ec786d221df93a0f8f6cf0bfbd727bfe957c9df"
  },
  {
   "file": "mpw-005_NSDM_tile_D3.png",
   "row": 3,
   "col": 2,
   "frame": "D3",
   "x": 15152,
   "y": 32328,
   "w": 7576,
   "h": 10776,
   "slot": "022",
   "project": "tia_for_physic_experiments",
   "bytes": 853822,
   "sha256": "c353151bcc09b69460f0bc453b9fab1f06bbd485aa318b2eb9ef500276948b70"
  },
  {
   "file": "mpw-005_NSDM_tile_D4.png",
   "row": 3,
   "col": 3,
   "frame": "D4",
   "x": 22728,
   "y": 32328,
   "w": 7576,
   "h": 10776,
   "slot": "023",
   "project": "qf105",
   "bytes": 1887335,
   "sha256": "1df968e8ddc3ad64408995ba60c250bf67ff7aa02f96e667ce09a6efa3962f33"
  },
  {
   "file": "mpw-005_NSDM_tile_D5.png",
   "row": 3,
   "col": 4,
   "frame": "D5",
   "x": 30304,
   "y": 32328,
   "w": 7576,
   "h": 10776,
   "slot": "024",
   "project": "coriolis_test_soc_-_mpw5_vexriscv",
   "bytes": 2219400,
   "sha256": "ad6669cf96753b5982a1168a29151b91120f64430749791af51cdf04b6058a0d"
  },
  {
   "file": "mpw-005_NSDM_tile_D6.png",
   "row": 3,
   "col": 5,
   "frame": "D6",
   "x": 37880,
   "y": 32328,
   "w": 7576,
   "h": 10776,
   "slot": "025",
   "project": "junga_soc_mpw5",
   "bytes": 1171208,
   "sha256": "7fea68c09dfe48931c7523fe71b70b3bc0b1a1467aef8011370813b690a4d529"
  },
  {
   "file": "mpw-005_NSDM_tile_D7.png",
   "row": 3,
   "col": 6,
   "frame": "D7",
   "x": 45456,
   "y": 32328,
   "w": 7976,
   "h": 10776,
   "slot": "026",
   "project": "nand_flash_mpw-5",
   "bytes": 833451,
   "sha256": "17e21205ce599fb72ca84fff03569f004b16f779cf372fc679607b5b29241e99"
  },
  {
   "file": "mpw-005_NSDM_tile_E1.png",
   "row": 4,
   "col": 0,
   "frame": "E1",
   "x": 0,
   "y": 43104,
   "w": 7576,
   "h": 10776,
   "slot": "027",
   "project": "kasirga-c0-mpw-5",
   "bytes": 1314429,
   "sha256": "6aa4959806f26b8443b307b8e7995d95618c8f341146904c6bfecab6e272cb25"
  },
  {
   "file": "mpw-005_NSDM_tile_E2.png",
   "row": 4,
   "col": 1,
   "frame": "E2",
   "x": 7576,
   "y": 43104,
   "w": 7576,
   "h": 10776,
   "slot": "028",
   "project": "delta-sigma_audio_dac__mpw5_",
   "bytes": 1498974,
   "sha256": "b222291bcf5abcbfcc0b7199b4eef979d0f0885653cf06216c2d2b5cc153da8c"
  },
  {
   "file": "mpw-005_NSDM_tile_E3.png",
   "row": 4,
   "col": 2,
   "frame": "E3",
   "x": 15152,
   "y": 43104,
   "w": 7576,
   "h": 10776,
   "slot": "029",
   "project": "wirelessenergyharvesting",
   "bytes": 840899,
   "sha256": "799e843a1374469c344ac98ee03451a391107c5081ccd7db7fa8d716f6b7d2a0"
  },
  {
   "file": "mpw-005_NSDM_tile_E4.png",
   "row": 4,
   "col": 3,
   "frame": "E4",
   "x": 22728,
   "y": 43104,
   "w": 7576,
   "h": 10776,
   "slot": "030",
   "project": "caravel_raster_engine",
   "bytes": 1709926,
   "sha256": "34f426d58774f0888760d11859b4f7464baf6d7fd411235f1381e512fe254714"
  },
  {
   "file": "mpw-005_NSDM_tile_E5.png",
   "row": 4,
   "col": 4,
   "frame": "E5",
   "x": 30304,
   "y": 43104,
   "w": 7576,
   "h": 10776,
   "slot": "031",
   "project": "DDR3_SSTL_TEST",
   "bytes": 866956,
   "sha256": "b6b8d8f9837716445a6827a359b2361c84809aa7b3f5539619797df451c888b7"
  },
  {
   "file": "mpw-005_NSDM_tile_E6.png",
   "row": 4,
   "col": 5,
   "frame": "E6",
   "x": 37880,
   "y": 43104,
   "w": 7576,
   "h": 10776,
   "slot": "032",
   "project": "accelerated_risc-v_cpus",
   "bytes": 976515,
   "sha256": "c07873d93a11d883cf5fac29d1b6b5c260f46fe4fa849f4fe8ac5573d9d83ba8"
  },
  {
   "file": "mpw-005_NSDM_tile_E7.png",
   "row": 4,
   "col": 6,
   "frame": "E7",
   "x": 45456,
   "y": 43104,
   "w": 7976,
   "h": 10776,
   "slot": "033",
   "project": "alu",
   "bytes": 941631,
   "sha256": "988202e7a21008af2994f779a30c18c5a05a9b832f5a054fd3dd4871b371a226"
  },
  {
   "file": "mpw-005_NSDM_tile_F1.png",
   "row": 5,
   "col": 0,
   "frame": "F1",
   "x": 0,
   "y": 53880,
   "w": 7576,
   "h": 11176,
   "slot": "034",
   "project": "4ft4",
   "bytes": 1043699,
   "sha256": "84285f773a0e9aa675be7010eacc8a48665372c15f3df0244c07f09feb8efcb4"
  },
  {
   "file": "mpw-005_NSDM_tile_F2.png",
   "row": 5,
   "col": 1,
   "frame": "F2",
   "x": 7576,
   "y": 53880,
   "w": 7576,
   "h": 11176,
   "slot": "035",
   "project": "rng_chaos",
   "bytes": 872347,
   "sha256": "72ecef8226d60ae617d9202b7058e3de49f53b16081e8c88d3b52f11196c179d"
  },
  {
   "file": "mpw-005_NSDM_tile_F3.png",
   "row": 5,
   "col": 2,
   "frame": "F3",
   "x": 15152,
   "y": 53880,
   "w": 7576,
   "h": 11176,
   "slot": "036",
   "project": "uetrv-ecore",
   "bytes": 1418032,
   "sha256": "773b01fec3d83964a8ef0329242c7d00b5fd5898619db7c2581801ff30992ed4"
  },
  {
   "file": "mpw-005_NSDM_tile_F4.png",
   "row": 5,
   "col": 3,
   "frame": "F4",
   "x": 22728,
   "y": 53880,
   "w": 7576,
   "h": 11176,
   "slot": "037",
   "project": "systolic_array",
   "bytes": 971604,
   "sha256": "c225c125a99b2ecbcedb41de6bf0ea5f6d1951e5ffc3f7d3068aeb4e8c7ff3ed"
  },
  {
   "file": "mpw-005_NSDM_tile_F5.png",
   "row": 5,
   "col": 4,
   "frame": "F5",
   "x": 30304,
   "y": 53880,
   "w": 7576,
   "h": 11176,
   "slot": "038",
   "project": "reram_test",
   "bytes": 870771,
   "sha256": "cd7dfe3f137f1ea22380962c47d81022b4752cc9d0b75578b86866020d85590b"
  },
  {
   "file": "mpw-005_NSDM_tile_F6.png",
   "row": 5,
   "col": 5,
   "frame": "F6",
   "x": 37880,
   "y": 53880,
   "w": 7576,
   "h": 11176,
   "slot": "039",
   "project": "secure_memory",
   "bytes": 1088457,
   "sha256": "584e8dbc45e8000198e9ce9f7e4965f0f7915c98a295a1fb9730ba8dacc0f15d"
  },
  {
   "file": "mpw-005_NSDM_tile_F7.png",
   "row": 5,
   "col": 6,
   "frame": "F7",
   "x": 45456,
   "y": 53880,
   "w": 7976,
   "h": 11176,
   "slot": "040",
   "project": "asynchronous_fibonacci_counter_testfix",
   "bytes": 971985,
   "sha256": "122f8bacf3704acee6df18ae67de8f8f41e3765b84641ac28b0ac1d3249c3f1f"
  }
 ],
 "sha256": {
  "png": "e8d4c40eb8dd7faadb4dbbb0d05643c873d7aa147cae4f0732eaaa32d27430b1",
  "filtered_stream": "e1d028e7c92dfd9a7b3ffafa28014d35d3247c22fe996b82e9aa5c9166794d41",
  "pixels": "fbbbcf0e17eeb73dec167d557e247f25ca9e4a591b962ab3e738309812b1f595"
 }
}
